1. Field of the Invention
The present invention relates generally to memory cell in a semiconductor integrated circuit. More specifically, the invention relates to a memory cell forming a semiconductor memory, such as DRAM and so forth.
2. Description of the Background Art
So-called gain cells, such as DRAMs, which is composed of the 4 transistors have been proposed. In the known art, a memory cell circuit has a pair of memory transistors. There memory transistors are connected between gates and drains to each other. The memory transistors also have sources which are commonly grounded. A first access transistor and a second access transistor are connected between gate-drain connections of the memory transistors and bit lines. The first and second access transistors have gates connected to a word line.
In the above described memory cell circuit, the first access transistor and the second access transistor are responsive to a selection signal input to the gates via the word line to perform switching operation. By this switching operation of the access transistors, ON/OFF control of the memory transistors is taken place. Also, by switching operation of the access transistors, output of the memory transistors to the bit lines are controlled.
However, in the above described memory cell circuit, there is a problem of channel leak between the transistors. That is, when channel leak occurs on the memory transistor and/or the access transistor, charge level at the gates of the memory transistor tends to be lowered. This causes change of stored data to bring an error of the data.
On the other hand, it is possible that substantial level of noise is superimposed on the signal in the bit lines. In this case, when the data are read from the above described memory cell circuit, the data which are stored in the gate of the each memory transistor can be alternated by the substantial level of the noise to reverse the stored information.
Moreover, nowadays, it has been strongly required to shorten access time for the integrated circuit, such as DRAMs and so forth.